High-Gain Topologies for Transparent Electronics

dc.contributor.author Bahubalindruni,P en
dc.contributor.author Vítor Grade Tavares en
dc.contributor.author Barquinha,P en
dc.contributor.author Martins,R en
dc.contributor.author Fortunato,E en
dc.date.accessioned 2018-01-16T15:52:44Z
dc.date.available 2018-01-16T15:52:44Z
dc.date.issued 2013 en
dc.description.abstract Transparent TFT technologies, with amorphous semiconductor oxides are lacking a complementary type transistor. This represents a real challenge, when the design of high-gain amplifiers are considered, without resorting to passive resistive elements. However, some solutions do exist to overcome the lack of a p-type transistor. This paper then presents a comparison analysis of two high-gain single-stage amplifier topologies using only n-type enhancement transistors. In these circuits, high gain is achieved using positive feedback for the load impedance. The comparison is carried out in terms of bandwidth, power consumption and complexity under identical bias conditions. Further, the same load impedance is used to develop a novel high-gain multiplier. All the circuits are simulated using a 0.35 mu m CMOS technology, as it is easy to test the reliability of the methods, since CMOS transistors have trustworthy models. en
dc.identifier.uri http://repositorio.inesctec.pt/handle/123456789/6405
dc.identifier.uri http://dx.doi.org/10.1109/eurocon.2013.6625261 en
dc.language eng en
dc.relation 2152 en
dc.rights info:eu-repo/semantics/openAccess en
dc.title High-Gain Topologies for Transparent Electronics en
dc.type conferenceObject en
dc.type Publication en
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