Please use this identifier to cite or link to this item: http://repositorio.inesctec.pt/handle/123456789/6405
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dc.contributor.authorBahubalindruni,Pen
dc.contributor.authorVítor Grade Tavaresen
dc.contributor.authorBarquinha,Pen
dc.contributor.authorMartins,Ren
dc.contributor.authorFortunato,Een
dc.date.accessioned2018-01-16T15:52:44Z-
dc.date.available2018-01-16T15:52:44Z-
dc.date.issued2013en
dc.identifier.urihttp://repositorio.inesctec.pt/handle/123456789/6405-
dc.identifier.urihttp://dx.doi.org/10.1109/eurocon.2013.6625261en
dc.description.abstractTransparent TFT technologies, with amorphous semiconductor oxides are lacking a complementary type transistor. This represents a real challenge, when the design of high-gain amplifiers are considered, without resorting to passive resistive elements. However, some solutions do exist to overcome the lack of a p-type transistor. This paper then presents a comparison analysis of two high-gain single-stage amplifier topologies using only n-type enhancement transistors. In these circuits, high gain is achieved using positive feedback for the load impedance. The comparison is carried out in terms of bandwidth, power consumption and complexity under identical bias conditions. Further, the same load impedance is used to develop a novel high-gain multiplier. All the circuits are simulated using a 0.35 mu m CMOS technology, as it is easy to test the reliability of the methods, since CMOS transistors have trustworthy models.en
dc.languageengen
dc.relation2152en
dc.rightsinfo:eu-repo/semantics/openAccessen
dc.titleHigh-Gain Topologies for Transparent Electronicsen
dc.typeconferenceObjecten
dc.typePublicationen
Appears in Collections:CTM - Articles in International Conferences

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