Browsing by Author João Paiva Cardoso

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Showing results 6 to 22 of 22 < previous 
Issue DateTitleAuthor(s)
2017Expressing and Applying C++ Code Transformations for the HDF5 API Through a DSLGolasowski,M; João Bispo; Martinovic,J; Slaninová,K; João Paiva Cardoso
2012FPGA-based High-Level Design Strategies to Accelerate a 3D Path Planning AlgorithmJoão Paiva Cardoso; João Teixeira; Ali Azarian; José Carlos Alves
2017Generation of Customized Accelerators for Loop Pipelining of Binary Instruction TracesNuno Miguel Paulino; João Canas Ferreira; João Paiva Cardoso
2012Hardware acceleration of a Stereo Navigation application with high-level C to HW synthesisJosé Carlos Alves; João Paiva Cardoso; Zlatko Petrov; João Vilela Teixeira
2013Hardware pipelining of repetitive patterns in processor instruction tracesJoão Bispo; João Paiva Cardoso; Monteiro,J
2017LARA as a language-independent aspect-oriented programming approachPinto,P; Carvalho,T; João Bispo; João Paiva Cardoso
2013The MATISSE MATLAB CompilerJoão Bispo; Pinto,P; Ricardo Ferreira Nobre; Carvalho,T; João Paiva Cardoso; Pedro Diniz
2017A MATLAB subset to C compiler targeting embedded systemsJoão Bispo; João Paiva Cardoso
2014Multi-target c code generation from MATLABJoão Bispo; Luís Cubal Reis; João Paiva Cardoso
2015A Reconfigurable Architecture for Binary Acceleration of Loops with Memory AccessesPaulino,N; João Canas Ferreira; João Paiva Cardoso
2012Specifying Compiler Strategies for FPGA-based SystemsJosé Carlos Alves; João Paiva Cardoso; Nome Apelido
2016SSA-based MATLAB-to-C compilation and optimizationLuís Cubal Reis; João Bispo; João Paiva Cardoso
2015Techniques for efficient MATLAB-to-C compilationJoão Bispo; Luís Cubal Reis; João Paiva Cardoso
2014Trace-Based Reconfigurable Acceleration with Data Cache and External Memory SupportPaulino,N; João Canas Ferreira; João Paiva Cardoso
2015Transparent acceleration of program execution using reconfigurable hardwareNuno Miguel Paulino; João Canas Ferreira; João Bispo; João Paiva Cardoso
2013Transparent runtime migration of loop-based traces of processor instructions to reconfigurable processing unitsJoão Bispo; Nuno Miguel Paulino; João Paiva Cardoso; João Canas Ferreira
2013Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW SystemsJoão Bispo; Nuno Miguel Paulino; João Paiva Cardoso; João Canas Ferreira