Please use this identifier to cite or link to this item:
http://repositorio.inesctec.pt/handle/123456789/5540
Title: | An FPGA implementation of a long short-Term memory neural network |
Authors: | João Canas Ferreira Fonseca,J |
Issue Date: | 2017 |
Abstract: | Our work proposes a hardware architecture for a Long Short-Term Memory (LSTM) Neural Network, aiming to outperform software implementations, by exploiting its inherent parallelism. The main design decisions are presented, along with the proposed network architecture. A description of the main building blocks of the network is also presented. The network is synthesized for various sizes and platforms, and the performance results are presented and analyzed. Our synthesized network achieves a 251 times speed-up over a custom-built software network, running on an i7-3770k Desktop computer, proving the benefits of parallel computation for this kind of network. © 2016 IEEE. |
URI: | http://repositorio.inesctec.pt/handle/123456789/5540 http://dx.doi.org/10.1109/reconfig.2016.7857151 |
metadata.dc.type: | conferenceObject Publication |
Appears in Collections: | CTM - Articles in International Conferences |
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File | Description | Size | Format | |
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P-00M-HSM.pdf | 306.56 kB | Adobe PDF | ![]() View/Open |
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