Please use this identifier to cite or link to this item:
http://repositorio.inesctec.pt/handle/123456789/5564
Title: | Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems |
Authors: | João Bispo Nuno Miguel Paulino João Paiva Cardoso João Canas Ferreira |
Issue Date: | 2013 |
Abstract: | This paper presents a novel approach to accelerate program execution by mapping repetitive traces of executed instructions, called Megablocks, to a runtime reconfigurable array of functional units. An offline tool suite extracts Megablocks from microprocessor instruction traces and generates a Reconfigurable Processing Unit (RPU) tailored for the execution of those Megablocks. The system is able to transparently movebcomputations from the microprocessor to the RPU at runtime. A prototype implementation of the system using a cacheless MicroBlaze microprocessor running code located in external memory reaches speedups from 2.2x to 18.2x for a set of 14 benchmark kernels. For a system setup which maximizes microprocessor performance by having the application code located in internal block RAMs, speedups from 1.4x to 2.8x were estimated. |
URI: | http://repositorio.inesctec.pt/handle/123456789/5564 http://dx.doi.org/10.1109/tii.2012.2235844 |
metadata.dc.type: | article Publication |
Appears in Collections: | CSIG - Articles in International Journals CTM - Articles in International Journals |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
P-006-8H5.pdf | 1.18 MB | Adobe PDF | ![]() View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.