Transparent current mirrors using A-GIZO TFTs: Simulation with RBF models and fabrication

dc.contributor.author Bahubalindruni,P en
dc.contributor.author Vítor Grade Tavares en
dc.contributor.author Manuel Cândido Santos en
dc.contributor.author Cardoso,N en
dc.contributor.author Oliveira,P en
dc.contributor.author Barquinha,P en
dc.contributor.author Martins,R en
dc.contributor.author Fortunato,E en
dc.date.accessioned 2018-01-16T16:07:48Z
dc.date.available 2018-01-16T16:07:48Z
dc.date.issued 2014 en
dc.description.abstract This paper analyzes transparent two-TFT current mirrors using a-GIZO TFTs with different mirroring ratios. In order to achieve a high mirroring ratio, the output TFT in the circuit employed a fingered structure layout to minimize area and overlap capacitance. The analysis of the current mirrors is performed in three phases. In the first, a radial basis function based (RBF) model is developed using measured data from fabricated TFTs on the same chip. Then, in the second phase, the RBF model is implemented in Verilog-A that is used to simulate two-TFT current mirrors with different mirroring ratios. The simulations are carried out using Cadence spectre simulator. In the third phase, simulation results are validated with the measured response from the fabricated circuits. © 2014 IEEE. en
dc.identifier.uri http://repositorio.inesctec.pt/handle/123456789/6415
dc.identifier.uri http://dx.doi.org/10.1109/uksim.2014.98 en
dc.language eng en
dc.relation 4730 en
dc.relation 2152 en
dc.rights info:eu-repo/semantics/openAccess en
dc.title Transparent current mirrors using A-GIZO TFTs: Simulation with RBF models and fabrication en
dc.type conferenceObject en
dc.type Publication en
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