A Low-Power and High Gain CMOS UWB Power Amplifier for Group 1~3 MB-OFDM Application

Abstract

The design of a 3 8 GHz UWB CMOS power amplifier (PA) for group 1~3 MB-OFDM applications in UMC 0.13μm CMOS technology is presented in this work. To obtain high gain and low power consumption PA is composed of two stages including cascode topology with an additional common-source stage used for the second stage. To achieve sufficient linearity and efficiency both stages operate in the Class-AB regime. The LC based networks are used to provide good input and output impedance matching. The resistive feedback is utilized in both stages to enhance bandwidth and improve wideband matching. Simulation results indicated that the input return loss (S11) was less than -6 dB, the output return loss (S22) was less than 3 dB, and reverse isolation (S12) was less than 41 dB over frequency range of interest. Maximal gain (S21) was 17.1 dB at 5.5 GHz while average gain was approximately 15 dB. Output 1-dB compression was 0.8 dBm. The PA presented offers excellent PAE of 15.3% with very low power...