Run-time Generation of Partial FPGA Configurations

dc.contributor.author Miguel L. Silva en
dc.contributor.author João Canas Ferreira en
dc.date.accessioned 2017-11-16T13:30:53Z
dc.date.available 2017-11-16T13:30:53Z
dc.date.issued 2012 en
dc.description.abstract en
dc.identifier.uri http://repositorio.inesctec.pt/handle/123456789/2327
dc.language eng en
dc.relation 473 en
dc.rights info:eu-repo/semantics/openAccess en
dc.title Run-time Generation of Partial FPGA Configurations en
dc.type article en
dc.type Publication en
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