Dynamically Reconfigurable FFT Processor for Flexible OFDM Baseband Processing
Dynamically Reconfigurable FFT Processor for Flexible OFDM Baseband Processing
dc.contributor.author | Mário Lopes Ferreira | en |
dc.contributor.author | Amin Barahimi | en |
dc.contributor.author | João Canas Ferreira | en |
dc.date.accessioned | 2018-01-05T16:20:57Z | |
dc.date.available | 2018-01-05T16:20:57Z | |
dc.date.issued | 2016 | en |
dc.description.abstract | The Physical layer architectures for the next generation of wireless devices will be characterized by a high degree of flexibility for real-time adaptation to communication conditions variability. OFDM-based architectures are strong candidates for the Physical layer implementation in 5G systems and one of the most important baseband processing operations required by this waveform is the Fast Fourier Transform (FFT). This paper proposes a dynamically reconfigurable FFT processor supporting FFT sizes and throughputs required by the most widely used wireless standards. The FFT reconfiguration was achieved by means of FPGA-based Dynamic Partial Reconfiguration (DPR) techniques, which enables run-time FFT size adaptation according to communication requirements and better resource utilization. The impact of DPR in terms of reconfiguration time and power consumption overhead was evaluated. The obtained results encourage the exploitation of DPR techniques to implement reconfigurable hardware infrastructures for OFDM baseband processing engines. | en |
dc.identifier.uri | http://repositorio.inesctec.pt/handle/123456789/5547 | |
dc.identifier.uri | http://dx.doi.org/10.1109/dtis.2016.7483874 | en |
dc.language | eng | en |
dc.relation | 473 | en |
dc.relation | 6500 | en |
dc.relation | 5052 | en |
dc.rights | info:eu-repo/semantics/openAccess | en |
dc.title | Dynamically Reconfigurable FFT Processor for Flexible OFDM Baseband Processing | en |
dc.type | conferenceObject | en |
dc.type | Publication | en |
Files
Original bundle
1 - 1 of 1