The Documental Repository is composed by a valious and extense variety of documents, including informational documents from all the 13 centres. The repository is organized in Communities and Collections: the first correspond to organic entities of INESC TEC and the latter comprise the outputs of each community organized by types of documents – articles in internacional journals, articles in internacional conferences, PhD Theses, among other documentation.
Browsing Documental Repository by Author "-Mišić"
Mirjana Videnović; Daniel Oliveira; Vítor Grade Tavares; -Mišić; Pydi Bahubalindruni; Manuel Cândido Santos
This paper presents the design of an energy detector for ultra-wideband impulse-based applications. It comprises a squarer using a passive mixer and an integrate-and-dump circuit on a single stage. A current-reuse topology was chosen to reduce the overall power consumption. The proposed energy detector targets low data-rate communications for noncoherent receivers, using on-off keying modulations. The circuit has been designed in a CMOS 180-nm process with 1.8-V power supply. The simulation results show a total power dissipation of 287-μW for a 1-Mbps data-rate using an indoor channel model.
Vítor Grade Tavares; ; Cândido Duarte; Vítor Grade Tavares; Jelena Radić; ; Alena Đ; Manuel Cândido Santos; -Mišić
The design of a 3 8 GHz UWB CMOS power amplifier (PA) for group 1~3 MB-OFDM applications in UMC 0.13μm CMOS technology is presented in this work.
To obtain high gain and low power consumption PA is composed of two stages including cascode topology with an additional common-source stage used for the second stage. To achieve sufficient linearity and efficiency both stages operate in the Class-AB regime. The LC based networks are used to provide good input and output impedance matching. The resistive feedback is utilized in both stages to enhance bandwidth and improve wideband matching. Simulation results indicated that the input return loss (S11) was less than -6 dB, the output return loss (S22) was less than 3 dB, and reverse isolation (S12) was less than 41 dB over frequency range of interest. Maximal gain (S21) was 17.1 dB at 5.5 GHz while average gain was approximately 15 dB. Output 1-dB compression was 0.8 dBm. The PA presented offers excellent PAE of 15.3% with very low power...
Vítor Grade Tavares; ugova; Jelena Radić; Manuel Cândido Santos; -Mišić; ; Cândido Duarte; Vítor Grade Tavares; Alena Đ
In this paper design of low noise amplifier (LNA) for the low frequency band, 3-5 GHz, in UMC 0.13μm CMOS technology is presented. In order to achieve good input matching common-gate topology is used. High gain with low power consumption is obtained using cascade circuit configuration. LNA shows less than -10.91 dB input return loss (S11) and less than -11.81 dB output return loss (S22), noise figure (NF) of 3.56 dB to 3.98 dB, maximum gain (S21) of 21.25 dB while dissipating 5.54 mA from 1.2 V supply. The high circuit stability parameters Kf>58.83 and B1f>0.98 are obtained.