HumanISE - Indexed Articles in Conferences
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ItemEvaluation of Heuristic Task-to-Thread Mapping Using Static and Dynamic Approaches( 2025)The increasing needs for high-performance computing capabilities in real-time systems is pushing the need for the use of complex parallel and heterogeneous platforms. This complicates and even invalidates the use of traditional mechanisms to derive and provide real-time guarantees. Task-to-thread mapping is a key process, not only to provide an optimal performance by enhancing load balance and reducing the overheads of the parallel runtime system, but also to enable predictable execution. To address these somehow contradictory requirements, this work leverages the OpenMP programming model and its implementation in the LLVM compilation framework by virtue of its programmability, performance, portability, and the recently demonstrated time-predictability. In this context, the paper provides an evaluation of different approaches to perform task-to-thread mapping, particularly comparing dynamic mapping, with mapping decisions made during execution, with a static mapping approach, where a fixed mapping is recorded in a preliminary execution, and then repeated in all executions. Static mapping is usually the preferred approach in real-time systems, due to being perceived as more predictable, whilst dynamic mapping is generally perceived as providing higher average performance. The obtained results allow to understand that although dynamic mapping indeed provides in general higher performance, it also may provide less variability, thus partially addressing the predictability concern, and opening opportunities for dynamic mapping in real-time highperformance systems.
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ItemSchedulability Analysis of OpenMP Applications Under Heuristic Task-To-Thread Mapping( 2026)Task-to-thread mapping is a key process in parallel applications to achieve the best possible performance. This process is even more challenging when it is required to meet the schedulability and timing requirements of critical systems. In these systems, mapping tasks to threads is usually carried out using static scheduling (i.e., offline mapping) to improve system schedulability, with several approaches being presented in the literature. Nevertheless, there has been little analysis on the impact that these static mapping approaches have on the schedulability of applications exploiting OpenMP, a model increasingly seen as a suitable mechanism to leverage the potential of parallel and heterogeneous processor architectures. This paper, therefore, performs a throughout evaluation of the recently presented heuristic task-to-thread mapping working with different heuristics through allocation and dispatching phases, compared with state-of-the-art, in terms of schedulability. This process is performed using a state-of-the-art schedulability analysis methodology through an integration of our simulator and an existing schedulability toolset. This evaluation allows for identifying the static heuristic mapping approaches that achieve tighter schedulability analysis than other methods in the literature.
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ItemFramework for the Analysis and Configuration of Real-Time OpenMP Applications( 2023)High-performance cyber-physical applications impose several requirements with respect to performance, functional correctness and non-functional aspects. Nowadays, the design of these systems usually follows a model-driven approach, where models generate executable applications, usually with an automated approach. As these applications might execute in different parallel environments, their behavior becomes very hard to predict, and making the verification of non-functional requirements complicated. In this regard, it is crucial to analyse and understand the impact that the mapping and scheduling of computation have on the real-time response of the applications. In fact, different strategies in these steps of the parallel orchestration may produce significantly different interference, leading to different timing behaviour. Tuning the application parameters and the system configuration proves to be one of the most fitting solutions. The design space can however be very cumbersome for a developer to test manually all combinations of application and system configurations. This paper presents a methodology and a toolset to profile, analyse, and configure the timing behaviour of highperformance cyber-physical applications and the target platforms. The methodology leverages on the possibility of generating a task dependency graph representing the parallel computation to evaluate, through measurements, different mapping configurations and select the one that minimizes response time.
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ItemConfiguration of Parallel Real-Time Applications on Multi-Core Processors( 2022)Parallel programming models (e.g., OpenMP) are more and more used to improve the performance of real-time applications in modern processors. Nevertheless, these processors have complex architectures, being very difficult to understand their timing behavior. The main challenge with most of existing works is that they apply static timing analysis for simpler models or measurement-based analysis using traditional platforms (e.g., single core) or considering only sequential algorithms. How to provide an efficient configuration for the allocation of the parallel program in the computing units of the processor is still an open challenge. This paper studies the problem of performing timing analysis on complex multi-core platforms, pointing out a methodology to understand the applications' timing behavior, and guide the configuration of the platform. As an example, the paper uses an OpenMP-based program of the Heat benchmark on a NVIDIA Jetson AGX Xavier. The main objectives are to analyze the execution time of OpenMP tasks, specify the best configuration of OpenMP directives, identify critical tasks, and discuss the predictability of the system/application. A Linux perf based measurement tool, which has been extended by our team, is applied to measure each task across multiple executions in terms of total CPU cycles, the number of cache accesses, and the number of cache misses at different cache levels, including L1, L2 and L3. The evaluation process is performed using the measurement of the performance metrics by our tool to study the predictability of the system/application.
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ItemHeuristic-based Task-to-Thread Mapping in Multi-Core Processors( 2022)OpenMP can be used in real-time applications to enhance system performance. However, predictability of OpenMP applications is still a challenge. This paper investigates heuristics for the mapping of OpenMP task graphs in underlying threads, for the development of time-predictable OpenMP programs. These approaches are based on a global scheduling queue, as well as per-thread allocation queues. The proposed method is divided into scheduling and allocation phases. In the former phase, OpenMP task-parts are discovered from OpenMP graph and placed in the scheduling queue. Afterwards, an appropriate allocation queue is selected for each task-part using four heuristic algorithms. In the latter phase, the best task-part is selected from the allocation queue to be allocated to and executed by an idle thread. Preliminary simulation results show that the new method overcomes BFS and WFS in terms of scheduling time and idle time.